EMCOS PCB VLAB

EMCoS PCB Vlab

Analysis

Parasitic RLC Extraction and S-parameters

EMCoS PCB VLab provides analysis tools for estimation of the parasitic effects on the printed circuit boards.
RapidRLC solver included in EMCoS PCB VLab package calculates resistance, inductance and capacitance matrices for complex three-dimensional geometries and generates lumped equivalent circuit files in SPICE format.
RapidRLC solver uses Method of Auxiliary Sources (MAS) for calculation of DC capacitance matrix and Method of Moments (MoM) for calculation of AC resistance and inductance matrices.
Generated parasitic circuit can be used further in EMC Studio system simulation analysis.
In addition, RapidRLC solver provides possibility to calculate S matrix for multiport system and visualize S-parameters in table and 2D plot views.

Simulation Workflow

Simulation workflow consists of the following steps:

  • Importing of PCB data from ODB++ format or from other CAD formats (SAT, IGES, CATIA V4, CATIA V5 or STEP)
  • Importing of additional geometry
  • Assignment of ports
  • Assignment of physical surface properties and Potential IDs
  • Running calculation
  • Results analysis